An image sensor has a large number of identical sensor elements (pixels), often greater than 1 million, in a Cartesian (square) grid. The distance between adjacent pixels is called the pitch (p). For square pixels, the area of a pixel is p2. The area of the photosensitive element, i.e., the area of the pixel that is sensitive to light for conversion to an electrical signal, is normally only about 20% to 30% of the overall surface area of the pixel.
Conventional color image sensors are fabricated with colored filters arranged in a Bayer configuration. A common example of a conventional Bayer filter pattern has a color scheme including red, green, and blue filters (RGB). The Bayer filter pattern is 50% green, 25% red and 25% blue, hence is also referred to GRGB or other permutation such as RGGB. In this arrangement, there are twice as many green elements as red or blue. This is used to mimic the human eye's greater sensitivity to the green light.
The complementary metal-oxide semiconductor (CMOS) Image Sensor (CIS) has been one of the early adopters of 3D integrated circuits (IC) integration offering low cost/high volume cameras for cell phones and other applications. One type of CIS is the back-side-illuminated (BSI) CIS. Smaller pixels result in higher resolution, smaller devices, and lower power and cost. Shrinking the pixel size in CMOS image sensors should be designed without degrading performance and image quality. As smaller and smaller pixels are fabricated on CMOS image sensors, however, the area of the photosensitive region becomes smaller thus leading to image quality deterioration.
The trends in BSI CIS are described in an article entitled “Backside Illumination (BSI) Architecture next for CMOS Image Sensors,” Semiconductor International, Aug. 3, 2008.
To solve this problem, companies worked on backside-illuminated (BSI) technology. OmniVision is an illustrative embodiment of such companies. OmniVision announced in May 2008 that it had developed the OmniBSI™ technology that involves turning the image sensor upside down and applying the color filters and micro lenses to the backside of the pixels so that the sensor can collect light through the area that has no circuitry, i.e. the backside.
The reason for the better performance of the BSI is higher fill factor, i.e. the amount of light that can be collected in a single pixel. The various metal layers on top of a front-illuminated sensor limit the light that can be collected in a pixel. As pixel sizes get smaller, the fill factor gets worse. BSI provides the most direct path for light to travel into the pixel, avoiding light blockage by the metal interconnect and dielectric layers on the top-side of the sensor die (see FIG. 1; source: OmniVision). In FIG. 1, the FSI pixel is a front side illuminated pixel while the BSI pixel is a back-side illuminated pixel. Note that as shown in FIG. 1, the terms back and front in BSI and FSI relates to the side from where the pixel is illuminated with relation to the side where the various metal layers are located.
OmniVision's BSI CMOS sensor has a pixel size of 0.9-1.4 μm for an 8-megapixel product. On the heels of the OmniVision announcement, Sony announced a BSI technology for CMOS sensors for 5-Mpixel camcorders or digital cameras with 1.75 μm CMOS pixel technology.
ST Micro has also demonstrated the feasibility of manufacturing 3-megapixel 1.45 μm CMOS image sensors using BSI technology. It claims to obtain a quantum efficiency (QE) (QE=the percentage of photons that are converted into electrons) of greater than 60%.
ST Micro's technology is based on SOi, wafer bonding and thinning technologies. In the ST Micro BSI scheme, after the final metal layers are created, a passivation layer and subsequent oxide wafer-bonding layer (WBL) are deposited. The WBL is planarized and a support wafer is bonded to the processed wafer, the CIS wafer is then thinned. Reported ST Micro Process flow:
SOI wafer
CMOS process
Wafer bonding layer (WBL) deposit and planarize
Wafer bonding
Thinning
Anti-reflective coating (ARC)
Pad opening
Color filters and micro-lens attached
A quick search of the patent landscape turned up U.S. Pat. No. 6,429,036 “Backside illumination of CMOS image sensor” (Micron); U.S. Pat. No. 5,244,817 “Method of making backside illuminated image sensors” (Kodak); US Pub. No. 2007/0152250 “CMOS image sensor with backside illumination” (MagnaChip); US Pub. No. 2008/0044984 “Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors.” (TSMC); U.S. Pat. No. 6,168,965 “Method for Making Backside Illuminated Image Sensor” (Tower Semi); US Pub. No. 2007/0052050 “Backside thinned image sensor with integrated lens stack” (IMEC).
Sarnoff (now a subsidiary of SRI International) has also announced entry into the CIS technology arena. At the 2008 Semicon West, Sarnoff introduced Ultra-Sense™, a thinning technology that they have developed for high-performance, SOI based, back-illuminated image sensors. After processes are completed on the frontside of the CIS wafer, the wafer backside is thinned. Sarnoff indicated that its backside thinning process using SOI wafers gives better control of the thinning process that improves pixel quality, lowers cost and improves the yield. In order to distinguish the three components of light so that the colors from a full color scene can be reproduced, the image sensors is the use of RBG filters such that two of the components of light are filtered out for each pixel using a filter. For example, the red pixel has a filter that absorbs green and blue light, only allowing red light to pass to the sensor. Thus, generally less than about one-third of the photon impinging on the image sensor are transmitted to the photosensitive element such as a photodiode and converted into electrons.